Control signals used for networking processors are typically stored in registers for access by processes executed by the processor. In situations where multiple processes are executed by the processor, one specific and dedicated register is allocated per individual set of control signals used by the processor. Each different set of control signals resides in a separate individual register. Because the control signals only require a few bits for storage, using an entire register leaves many unused bits.
Another approach to storing the control signal data in a shared register is to use a software locking mechanism to prevent writing to the register by concurrently executing processes. Under this approach, the following steps are performed by execution of a sequence of instructions by the processor while disallowing execution of the instructions by another executing process. The contents of the register are read and merged together with the control data to be written. All read values of the register not owned by the writing process are retained during the merge and the merged control data is then written to the register. Management of the locking mechanism according to this approach is cumbersome and adds additional complexity to the executing processes.